CPU and MPSoC Performance Engineer (RE1-2)

Context And Mission

The Barcelona Supercomputing Center - Centro Nacional de Supercomputación (BSC-CNS) is the leading supercomputing center in Spain. It houses MareNostrum, one of the most powerful supercomputers in Europe, was a founding and hosting member of the former European HPC infrastructure PRACE (Partnership for Advanced Computing in Europe), and is now hosting entity for EuroHPC JU, the Joint Undertaking that leads large-scale investments and HPC provision in Europe. The mission of BSC is to research, develop and manage information technologies in order to facilitate scientific progress. BSC combines HPC service provision and R&D into both computer and computational science (life, earth and engineering sciences) under one roof, and currently has over 1200 staff from 60 countries.

BSC is involved in several projects on the design of innovative RISC-V based CPU processor, accelerators, and MPSos. BSC is also carrying out activities related to the performance analysis of the latest commercial computing solutions in the market. We are looking to hire a performance engineer that will assume an important role in RTL-simulation, FPGA, and silicon performance verification for BSC RISC-V designs.

Key Duties

Develop peak-performance benchmarks for the performance evaluation of specific hardware target systems in RTL simulation, FPGA, and silicon.
Develop specific ‘corner-case’ benchmarks for the assessment of particular MPSoC functionalities. This task will be done in collaboration with the hardware engineers in charge of the RISC-V designs at BSC.
Profile of specific applications on the target hardware systems to extract representative kernels. Applications of interest include HPC applications, AI (artificial intelligence) applications, and embedded applications
Developing and automating the overall performance analysis infrastructure
Identify key hardware and software bottlenecks
Collaborate with application development teams